A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks

A cyclic A/D conversion circuit technique for sensor networks has been developed using 0.2-μm CMOS/FD-SOI technology. The FD-SOI analog switches can lower the supply voltage without degrading accuracy because of their negligible body effect. The proposed A/D converter achieves operation at the supply voltage of 1 V or less and can handle a sampling frequency ranging from 8 Sps to 8 kSps with a new clocking technique. key words: A/D converter, sample hold, FD-SOI, low voltage